? semiconductor components industries, llc, 2000 august, 2000 rev. 4 1 publication order number: mc14076b/d mc14076b 4-bit d-type register with three-state outputs the mc14076b 4bit register consists of four dtype flipflops operating synchronously from a common clock. or gated outputdisable inputs force the outputs into a highimpedance state for use in bus organized systems. or gated datadisable inputs cause the q outputs to be fed back to the d inputs of the flipflops. thus they are inhibited from changing state while the clocking process remains undisturbed. an asynchronous master root is provided to clear all four flipflops simultaneously independent of the clock or disable inputs. ? threestate outputs with gated control lines ? fully independent clock allows unrestricted operation for the two modes: parallel load and do nothing ? asynchronous master reset ? four bus buffer registers ? supply voltage range = 3.0 vdc to 18 vdc ? capable of driving two lowpower ttl loads or one lowpower schottky ttl load over the rated temperature range maximum ratings (voltages referenced to v ss ) (note 1.) symbol parameter value unit v dd dc supply voltage range 0.5 to +18.0 v v in , v out input or output voltage range (dc or transient) 0.5 to v dd + 0.5 v i in , i out input or output current (dc or transient) per pin 10 ma p d power dissipation, per package (note 2.) 500 mw t a ambient temperature range 55 to +125 c t stg storage temperature range 65 to +150 c t l lead temperature (8second soldering) 260 c 1. maximum ratings are those values beyond which damage to the device may occur. 2. temperature derating: plastic ap and d/dwo packages: 7.0 mw/ c from 65 c to 125 c this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. for proper operation, v in and v out should be constrained to the range v ss (v in or v out ) v dd . unused inputs must always be tied to an appropriate logic voltage level (e.g., either v ss or v dd ). unused outputs must be left open. http://onsemi.com a = assembly location wl, l = wafer lot yy, y = year ww, w = work week device package shipping ordering information mc14076bcp pdip16 2000/box mc14076bd soic16 2400/box mc14076bdr2 soic16 2500/tape & reel marking diagrams 1 16 pdip16 p suffix case 648 mc14076bcp awlyyww soic16 d suffix case 751b 1 16 14076b awlyww
mc14076b http://onsemi.com 2 pin assignment 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 d2 d1 d0 r v dd a b d3 q1 b a v ss c q3 q2 q0 output disable data disable { } block diagram 15 14 13 12 11 10 9 7 2 1 3 4 5 6 reset d0 d1 d2 d3 b a clock b a data disable output disable v dd = pin 16 v ss = pin 8 q0 q1 q2 q3 function table inputs data disable data output reset clock a b data d o u tp u t q 1 x x x x 0 0 0 x x x q n 0 1 x x q n 0 x 1 x q n 0 0 0 0 0 0 0 0 1 1 when either output disable a or b (or both) is (are) high the output is disabled to the highimpedance state; however sequential operation of the flipflops is not affected. x = don't care.
mc14076b http://onsemi.com 3 ????????????????????????????????? ????????????????????????????????? electrical characteristics (voltages referenced to v ss ) ?????????? ?????????? ???? ???? ??? ??? v dd ????? ????? 55 c ????????? ????????? 25 c ????? ????? 125 c ??? ??? ?????????? ?????????? characteristic ???? ???? symbol ??? ??? v dd vdc ??? ??? min ??? ??? max ???? ???? min ??? ??? typ (3.) ???? ???? max ??? ??? min ??? ??? max ??? ??? unit ?????????? ? ???????? ? ?????????? output voltage a0o level v in = v dd or 0 ???? ? ?? ? ???? v ol ??? ? ? ? ??? 5.0 10 15 ??? ? ? ? ??? e e e ??? ? ? ? ??? 0.05 0.05 0.05 ???? ? ?? ? ???? e e e ??? ? ? ? ??? 0 0 0 ???? ? ?? ? ???? 0.05 0.05 0.05 ??? ? ? ? ??? e e e ??? ? ? ? ??? 0.05 0.05 0.05 ??? ? ? ? ??? vdc ?????????? ? ???????? ? ?????????? a1o level v in = 0 or v dd ???? ? ?? ? ???? v oh ??? ? ? ? ??? 5.0 10 15 ??? ? ? ? ??? 4.95 9.95 14.95 ??? ? ? ? ??? e e e ???? ? ?? ? ???? 4.95 9.95 14.95 ??? ? ? ? ??? 5.0 10 15 ???? ? ?? ? ???? e e e ??? ? ? ? ??? 4.95 9.95 14.95 ??? ? ? ? ??? e e e ??? ? ? ? ??? vdc ?????????? ? ???????? ? ? ???????? ? ?????????? input voltage a0o level (v o = 4.5 or 0.5 vdc) (v o = 9.0 or 1.0 vdc) (v o = 13.5 or 1.5 vdc) ???? ? ?? ? ? ?? ? ???? v il ??? ? ? ? ? ? ? ??? 5.0 10 15 ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? 1.5 3.0 4.0 ???? ? ?? ? ? ?? ? ???? e e e ??? ? ? ? ? ? ? ??? 2.25 4.50 6.75 ???? ? ?? ? ? ?? ? ???? 1.5 3.0 4.0 ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? 1.5 3.0 4.0 ??? ? ? ? ? ? ? ??? vdc ?????????? ? ???????? ? ? ???????? ? ?????????? a1o level (v o = 0.5 or 4.5 vdc) (v o = 1.0 or 9.0 vdc) (v o = 1.5 or 13.5 vdc) ???? ? ?? ? ? ?? ? ???? v ih ??? ? ? ? ? ? ? ??? 5.0 10 15 ??? ? ? ? ? ? ? ??? 3.5 7.0 11 ??? ? ? ? ? ? ? ??? e e e ???? ? ?? ? ? ?? ? ???? 3.5 7.0 11 ??? ? ? ? ? ? ? ??? 2.75 5.50 8.25 ???? ? ?? ? ? ?? ? ???? e e e ??? ? ? ? ? ? ? ??? 3.5 7.0 11 ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? vdc ?????????? ? ???????? ? ? ???????? ? ? ???????? ? ?????????? output drive current (v oh = 2.5 vdc) source (v oh = 4.6 vdc) (v oh = 9.5 vdc) (v oh = 13.5 vdc) ???? ? ?? ? ? ?? ? ? ?? ? ???? i oh ??? ? ? ? ? ? ? ? ? ? ??? 5.0 5.0 10 15 ??? ? ? ? ? ? ? ? ? ? ??? 3.0 0.64 1.6 4.2 ??? ? ? ? ? ? ? ? ? ? ??? e e e e ???? ? ?? ? ? ?? ? ? ?? ? ???? 2.4 0.51 1.3 3.4 ??? ? ? ? ? ? ? ? ? ? ??? 4.2 0.88 2.25 8.8 ???? ? ?? ? ? ?? ? ? ?? ? ???? e e e e ??? ? ? ? ? ? ? ? ? ? ??? 1.7 0.36 0.9 2.4 ??? ? ? ? ? ? ? ? ? ? ??? e e e e ??? ? ? ? ? ? ? ? ? ? ??? madc ?????????? ? ???????? ? ?????????? (v ol = 0.4 vdc) sink (v ol = 0.5 vdc) (v ol = 1.5 vdc) ???? ? ?? ? ???? i ol ??? ? ? ? ??? 5.0 10 15 ??? ? ? ? ??? 0.64 1.6 4.2 ??? ? ? ? ??? e e e ???? ? ?? ? ???? 0.51 1.3 3.4 ??? ? ? ? ??? 0.88 2.25 8.8 ???? ? ?? ? ???? e e e ??? ? ? ? ??? 0.36 0.9 2.4 ??? ? ? ? ??? e e e ??? ? ? ? ??? madc ?????????? ?????????? input current ???? ???? i in ??? ??? 15 ??? ??? e ??? ??? 0.1 ???? ???? e ??? ??? 0.00001 ???? ???? 0.1 ??? ??? e ??? ??? 1.0 ??? ??? m adc ?????????? ? ???????? ? ?????????? input capacitance (v in = 0) ???? ? ?? ? ???? c in ??? ? ? ? ??? e ??? ? ? ? ??? e ??? ? ? ? ??? e ???? ? ?? ? ???? e ??? ? ? ? ??? 5.0 ???? ? ?? ? ???? 7.5 ??? ? ? ? ??? e ??? ? ? ? ??? e ??? ? ? ? ??? pf ?????????? ? ???????? ? ?????????? quiescent current (per package) ???? ? ?? ? ???? i dd ??? ? ? ? ??? 5.0 10 15 ??? ? ? ? ??? e e e ??? ? ? ? ??? 5.0 10 20 ???? ? ?? ? ???? e e e ??? ? ? ? ??? 0.005 0.010 0.015 ???? ? ?? ? ???? 5.0 10 20 ??? ? ? ? ??? e e e ??? ? ? ? ??? 150 300 600 ??? ? ? ? ??? m adc ?????????? ? ???????? ? ? ???????? ? ? ???????? ? ?????????? total supply current (4.) (5.) (dynamic plus quiescent, per package) (c l = 50 pf on all outputs, all buffers switching) ???? ? ?? ? ? ?? ? ? ?? ? ???? i t ??? ? ? ? ? ? ? ? ? ? ??? 5.0 10 15 ????????????????? ? ??????????????? ? ? ??????????????? ? ? ??????????????? ? ????????????????? i t = (0.75 m a/khz) f + i dd i t = (1.50 m a/khz) f + i dd i t = (2.25 m a/khz) f + i dd ??? ? ? ? ? ? ? ? ? ? ??? m adc ?????????? ?????????? threestate leakage current ???? ???? i tl ??? ??? 15 ??? ??? e ??? ??? 0.1 ???? ???? e ??? ??? 0.0001 ???? ???? 0.1 ??? ??? e ??? ??? 3.0 ??? ??? m adc 3. data labelled atypo is not to be used for design purposes but is intended as an indication of the ic's potential performance. 4. the formulas given are for the typical characteristics only at 25 c. 5. to calculate total supply current at loads other than 50 pf: i t (c l ) = i t (50 pf) + (c l 50) vfk where: i t is in m a (per package), c l in pf, v = (v dd v ss ) in volts, f in khz is input frequency, and k = 0.002.
mc14076b http://onsemi.com 4 ????????????????????????????????? ????????????????????????????????? switching characteristics (6.) (c l = 50 pf, t a = 25 c) ??????????????? ? ????????????? ? ??????????????? characteristic ????? ? ??? ? ????? symbol ???? ? ?? ? ???? v dd vdc ???? ? ?? ? ???? min ???? ? ?? ? ???? typ (7.) ???? ? ?? ? ???? max ??? ? ? ? ??? unit ??????????????? ? ????????????? ? ??????????????? output rise and fall time t tlh , t thl = (1.5 ns/pf) c l + 25 ns t tlh , t thl = (0.75 ns/pf) c l + 12.5 ns t tlh , t thl = (0.55 ns/pf) c l + 9.5 ns ????? ? ??? ? ????? t tlh , t thl ???? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ???? e e e ???? ? ?? ? ???? 100 50 40 ???? ? ?? ? ???? 200 100 80 ??? ? ? ? ??? ns ??????????????? ? ????????????? ? ? ????????????? ? ? ????????????? ? ??????????????? propagation delay time clock to q t plh , t phl = (1.7 ns/pf) c l + 215 ns t plh , t phl = (0.66 ns/pf) c l + 92 ns t plh , t phl = (0.5 ns/pf) c l + 65 ns ????? ? ??? ? ? ??? ? ? ??? ? ????? t plh , t phl ???? ? ?? ? ? ?? ? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ? ?? ? ? ?? ? ???? e e e ???? ? ?? ? ? ?? ? ? ?? ? ???? 300 125 90 ???? ? ?? ? ? ?? ? ? ?? ? ???? 600 250 180 ??? ? ? ? ? ? ? ? ? ? ??? ns ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? reset to q t plh , t phl = (1.7 ns/pf) c l + 215 ns t plh , t phl = (0.66 ns/pf) c l + 92 ns t plh , t phl = (0.5 ns/pf) c l + 65 ns ????? ? ??? ? ? ??? ? ????? ???? ? ?? ? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ? ?? ? ???? e e e ???? ? ?? ? ? ?? ? ???? 300 125 90 ???? ? ?? ? ? ?? ? ???? 600 250 180 ??? ? ? ? ? ? ? ??? ??????????????? ? ????????????? ? ??????????????? 3state propagation delay, output a1o or a0o to high impedance ????? ? ??? ? ????? t phz , t plz ???? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ???? e e e ???? ? ?? ? ???? 150 60 45 ???? ? ?? ? ???? 300 120 90 ??? ? ? ? ??? ns ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? 3state propagation delay, high impedance to a1o or a0o level ????? ? ??? ? ? ??? ? ????? t pzh , t pzl ???? ? ?? ? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ? ?? ? ???? e e e ???? ? ?? ? ? ?? ? ???? 200 80 60 ???? ? ?? ? ? ?? ? ???? 400 160 120 ??? ? ? ? ? ? ? ??? ns ??????????????? ? ????????????? ? ??????????????? clock pulse width ????? ? ??? ? ????? t wh ???? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ???? 260 110 80 ???? ? ?? ? ???? 130 55 40 ???? ? ?? ? ???? e e e ??? ? ? ? ??? ns ??????????????? ? ????????????? ? ??????????????? reset pulse width ????? ? ??? ? ????? t wh ???? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ???? 370 150 110 ???? ? ?? ? ???? 185 75 55 ???? ? ?? ? ???? e e e ??? ? ? ? ??? ns ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? data setup time ????? ? ??? ? ? ??? ? ????? t su ???? ? ?? ? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ? ?? ? ???? 30 10 4 ???? ? ?? ? ? ?? ? ???? 15 5 2 ???? ? ?? ? ? ?? ? ???? e e e ??? ? ? ? ? ? ? ??? ns ??????????????? ? ????????????? ? ??????????????? data hold time ????? ? ??? ? ????? t h ???? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ???? 130 60 50 ???? ? ?? ? ???? 65 30 25 ???? ? ?? ? ???? e e e ??? ? ? ? ??? ns ??????????????? ? ????????????? ? ??????????????? data disable setup time ????? ? ??? ? ????? t su ???? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ???? 220 80 50 ???? ? ?? ? ???? 110 40 25 ???? ? ?? ? ???? e e e ??? ? ? ? ??? ns ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? clock pulse rise and fall time ????? ? ??? ? ? ??? ? ????? t tlh , t thl ???? ? ?? ? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ? ?? ? ???? e e e ???? ? ?? ? ? ?? ? ???? e e e ???? ? ?? ? ? ?? ? ???? 15 5 4 ??? ? ? ? ? ? ? ??? m s ??????????????? ? ????????????? ? ??????????????? clock pulse frequency ????? ? ??? ? ????? f cl ???? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ???? e e e ???? ? ?? ? ???? 3.6 9.0 12 ???? ? ?? ? ???? 1.8 4.5 6.0 ??? ? ? ? ??? mhz 6. the formulas given are for the typical characteristics only at 25 c. 7. data labelled atypo is not to be used for design purposes but is intended as an indication of the ic's potential performance.
mc14076b http://onsemi.com 5 figure 1. timing diagram input rise and fall 20 ns d input information v dd v ss v ss v oh v ol v dd q output 90% 50% 10% t su t h t su t h 20ns 90% 10% 50% 90% 10% t tlh t phl t thl 50% t wh t wl f cl reset = 0 data disable a and b = 0 output disable a and b = 0 figure 2. threestate propagation delay waveshape and circuit mc14076b other inputs output disable a or b any q output r l = 1 k w c l v dd for t plz and t pzl v ss for t phz and t pzh output disable a or b any q output any q output 20ns 20ns v dd v ss v oh 90% 50% 50% 10% t plz t pzl 90% t pzh t phz 90% 10% 10% 2.5 v @ v dd = 5 v, 10 v, and 15 v 2 v @ v dd = 5 v 6 v @ v dd = 10 v 10 v @ v dd = 15 v v ol outputs connected outputs disconnected outputs connected t plh equivalent functional block diagram output disable a output disable b d0 1 2 14 data disable a data disable b 9 10 d1 13 clock 7 d2 12 d3 1 1 reset 15 6q3 5q2 4q1 3q0 dq r c q dq r c q dq r c q dq r c q
mc14076b http://onsemi.com 6 package dimensions pdip16 p suffix plastic dip package case 64808 issue r notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. a b f c s h g d j l m 16 pl seating 18 9 16 k plane t m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01
mc14076b http://onsemi.com 7 package dimensions soic16 d suffix plastic soic package case 751b05 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45 g 8 pl p b a m 0.25 (0.010) b s t d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019
mc14076b http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402745 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc14076b/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk
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